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Replaced the GNU-only dsb/isb 0xF operands with the UAL sy form - #729

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fdesbiens merged 1 commit into
eclipse-threadx:devfrom
fdesbiens:fix/issue-551
Sep 15, 2026
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fdesbiens merged 1 commit into
eclipse-threadx:devfrom
fdesbiens:fix/issue-551

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@fdesbiens fdesbiens commented Sep 11, 2026

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Fixes #551

_tx_thread_system_return_inline() in the Cortex-M tx_port.h headers spells
its barriers dsb 0xF and isb 0xF. A bare hexadecimal operand is a GNU
assembler extension, and IAR rejects it with operand syntax error, so the
header cannot be included at all. The block is guarded for GCC, armclang and IAR
together, so every IAR user of an affected port hits it -- four independent
reports on Cortex-M33 and M7 with EWARM 9.50 and 9.70.

Both operands become sy, the Arm UAL name for exactly what 0xF encodes. The
generated instruction is unchanged. Applied to the two ports_arch masters and
all 32 copies under ports, covering M0, M23, M3, M33, M4, M52, M55, M7 and M85
across ac5, ac6, gnu, iar and keil, plus the scripts/check_ports.sh probes that
matched the old spelling.

check_ports.sh passes, the copy scripts still reproduce every generated port
byte for byte, and arm-none-eabi-gcc -O2 compiles a caller for every patched
header, emitting dsb sy and isb sy. Three headers that need toolchain
intrinsics GCC does not ship fail identically on dev.

…AL sy form, so tx_port.h now assembles under IAR as well as GCC and armclang

The inline _tx_thread_system_return_inline implementation in the Cortex-M
tx_port.h headers issued its data and instruction barriers as "dsb 0xF"
and "isb 0xF". A bare hexadecimal operand is a GNU assembler extension.
IAR's inline assembler only accepts the architectural option names, so it
rejected the line with "operand syntax error" and the header could not be
included at all. The block is guarded for GCC, armclang and IAR together,
so every IAR user of an affected port hit this the moment inlining was
left enabled.

Replaced both operands with "sy", the Arm UAL name for the full system
domain and the exact value 0xF encodes. The generated instruction is
unchanged; only the spelling of the operand differs. "sy" is the
canonical form in the Arm Architecture Reference Manual and is accepted
by GNU as, armclang and IAR alike, which is why every reporter converged
on it independently as a local workaround.

The change was applied to the two ports_arch master headers and to all
thirty-two generated or hand-maintained copies under ports, covering the
Cortex-M0, M23, M3, M33, M4, M52, M55, M7 and M85 families across the
ac5, ac6, gnu, iar and keil toolchains.

scripts/check_ports.sh probed for the literal strings "dsb 0xF" and
"isb 0xF" when reporting toolchain divergence within the hand-maintained
M0 and M23 families. Updated the probes to the new spelling so the check
keeps working.

Verified that arm-none-eabi-gcc assembles the new form for every Cortex-M
target the ports cover, and confirmed the regenerated ports match their
masters.

Assisted-by: Copilot (Opus 5) <noreply@github.com>
@fdesbiens fdesbiens changed the title Replaced the GNU-only dsb 0xF and isb 0xF barrier operands with the UAL sy form, so tx_port.h now assembles under IAR as well as GCC and armclang Replaced the GNU-only dsb/isb 0xF operands with the UAL sy form Sep 15, 2026
@fdesbiens
fdesbiens merged commit 9b2979e into eclipse-threadx:dev Sep 15, 2026
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@fdesbiens
fdesbiens deleted the fix/issue-551 branch September 16, 2026 13:28
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