Replaced the GNU-only dsb/isb 0xF operands with the UAL sy form - #729
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…AL sy form, so tx_port.h now assembles under IAR as well as GCC and armclang The inline _tx_thread_system_return_inline implementation in the Cortex-M tx_port.h headers issued its data and instruction barriers as "dsb 0xF" and "isb 0xF". A bare hexadecimal operand is a GNU assembler extension. IAR's inline assembler only accepts the architectural option names, so it rejected the line with "operand syntax error" and the header could not be included at all. The block is guarded for GCC, armclang and IAR together, so every IAR user of an affected port hit this the moment inlining was left enabled. Replaced both operands with "sy", the Arm UAL name for the full system domain and the exact value 0xF encodes. The generated instruction is unchanged; only the spelling of the operand differs. "sy" is the canonical form in the Arm Architecture Reference Manual and is accepted by GNU as, armclang and IAR alike, which is why every reporter converged on it independently as a local workaround. The change was applied to the two ports_arch master headers and to all thirty-two generated or hand-maintained copies under ports, covering the Cortex-M0, M23, M3, M33, M4, M52, M55, M7 and M85 families across the ac5, ac6, gnu, iar and keil toolchains. scripts/check_ports.sh probed for the literal strings "dsb 0xF" and "isb 0xF" when reporting toolchain divergence within the hand-maintained M0 and M23 families. Updated the probes to the new spelling so the check keeps working. Verified that arm-none-eabi-gcc assembles the new form for every Cortex-M target the ports cover, and confirmed the regenerated ports match their masters. Assisted-by: Copilot (Opus 5) <noreply@github.com>
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Fixes #551
_tx_thread_system_return_inline()in the Cortex-Mtx_port.hheaders spellsits barriers
dsb 0xFandisb 0xF. A bare hexadecimal operand is a GNUassembler extension, and IAR rejects it with
operand syntax error, so theheader cannot be included at all. The block is guarded for GCC, armclang and IAR
together, so every IAR user of an affected port hits it -- four independent
reports on Cortex-M33 and M7 with EWARM 9.50 and 9.70.
Both operands become
sy, the Arm UAL name for exactly what0xFencodes. Thegenerated instruction is unchanged. Applied to the two
ports_archmasters andall 32 copies under
ports, covering M0, M23, M3, M33, M4, M52, M55, M7 and M85across ac5, ac6, gnu, iar and keil, plus the
scripts/check_ports.shprobes thatmatched the old spelling.
check_ports.shpasses, the copy scripts still reproduce every generated portbyte for byte, and
arm-none-eabi-gcc -O2compiles a caller for every patchedheader, emitting
dsb syandisb sy. Three headers that need toolchainintrinsics GCC does not ship fail identically on
dev.